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Xilinx Developers Forum (XDF-2019)

This year I had the opportunity to attend the Xilinx Developer’s Forum, (XDF-2019)

This is Xilinx’s yearly FPGA event that showcases where they are, and where they are headed in in the future. The conference location was packed, and I had two full days of sessions, and Xilinx and many of their partners were showcasing their latest offerings.

Keynote: Victor Peng; President and Chief Executive Officer

Victor Peng, Xilinx’s President and Chief Executive Officer did an outstanding job setting the direction of the Keynote focus on AI, the Cloud, and big data, and Xilinx role in these incredibly compute intensive applications. He was followed by industry leaders from AWS, Microsoft, IBM, Samsung and others all showing where Xilinx position is fitting into their ecosystems.

The two BIG announcement for the show were the new tool VITIS and that Microsoft Azure was now supporting Alveo FPGA Acceleration in the cloud along side AWS and Nimbix

VITIS is a new unified development environment allowing developers who use C, C++, OpenCL, Tensorflow, Caffe, and PyTorch to accelerate their programs using the power of FPGA’s and/or the Alveo FPGA cards.

For high compute AI applications, they definitely put NVIDIA in their crosshairs, and have fired a major shot a large NVIDIA market.

The days were fully packed, and I was not able to attend every presentation (You need at least 5-7 at the show to attend every session), but here’s a brief rundown of the sessions I did manage to take in:

VITIS AI for Cloud to Edge An overview: (presented by: Kamran Khan; Sr. Product Manager, AI/ML)

This was an overview of the VITIS software for the cloud and the various libraries they are supporting, and the ease of migration form a GPU to FPGA accelerator. Between Xilinx and their partners, you will be able to shorten both your FPGA development time as well as your software run time.

Machine Learning for Aerospace and Defense Applications: (Presented by: Jason Vidmar; System Architect Military Communications & Machine Learning)

This session had a military/defense/security focus along with how to implement Alveo based systems in a secure environment. It also covered many of the ways AI may be either exploited and/or confused to caused mis-identification. It’s was a very interesting talk that highlighted where AI is, and some of its shortcomings, especially when under a directed attack.

VITIS Runtime Deep Dive (Presented by: Ricky Su; AI & Software Acceleration Technical Marketing and Sonal Santan; Engineering)

This went into the XRT kernel layer of the VITIS runtime and discussed how XRT was the interface between the higher layer programming languages like OpenCL and the FPGA hardware. For the typical user, this level of detail is not required, but it’s great to have it available, and open sourced. If you need it, it’s there to be tweaked.

VITIS for ISV Developers and Ecosystems (Presented by: Daniel Gibbons; Vice President, FPGA Software Development, Xilinx Datacenter Group)

Daniel gave a great talk on the VITIS Ecosystem and how partners were filling key roles in this ecosystem. I look forward to possibly working with Daniel in the future on parts of this ecosystem, so stay tuned.

Zynq Ultrascale+ RFSoC Design (Presented by: David Brubaker; Sr. Product Line Manager and Vicent Mui; Technical Marketing RFSoC)

The Zynq Ultrascale+ is a mix RF ADC/DAC chip alongside FPGA fabric that allows direct sampling of RF signals and allows almost single chip Software Defined radios for 5G Base Stations and Radar Applications. These are extremely powerful chips that offer up 16 ADC and 16 DAC’s sampling in the 4-6 GHz range including released, sampling and future versions. However since they cross over between the FPGA and RF domains, the tools used are a bit specialized and varied depending on what you need to do. So this was a great rundown of the tools available, and where they fit to make successful designs.

Development with VITIS Libraries (Presented by, Alvan Clark; Sr. Technical Marketing Engineer)

Xilinx is really embracing the open source movement with VITIS and are releasing the libraries under Apache license model. But keeping them fully supported by Xilinx as a product. They are hoping to drive support for their ecosystem and expand the libraries and capabilities in the future while giving the companies using the libraries the ability to go under the hood to examine the code, and improve upon it if necessary. This is a great move by Xilinx!

VITIS Experts Panel:

  • Rob Armstrong: (Xilinx: Director AI and Software Acceleration)
  • Ping Fan (DeepPoly: CEO)
  • Brian Turnquist:  (Boon Logic: CTO)
  • ???? (Boon Logic: Computer Vision Software Developer)
  • Abhishek Ranjan (BigZetta: Founder)
  • Chris Kachris (InAccel: CEO)
  • Balavinayagam Samynathan (BigSteam)

The goal of the experts panel was to give early VITIS users the ability to tell their experience with VITIS on various projects. Rob pretty much stayed out of the conversation after introducing the panel, unless a question was specifically targeted to Xilinx. The first half was a quick introduction by each panel member on their company and how they are using VITIS, and then it was open to questions from the floor. This really showed that the development time from standard FPGA flows to VITIS is significantly reduced. It was an outstanding demonstration of the possibilities with Alveo and VITIS.

AI Inference on Versal ACAP (Presented by: Nick Ni; Director of Product Marketing AI and Edge Computing, and George Wange; Sr. Product Manager Xilinx, Versal AI & AIE Toolflow)

Xilinx is doubling down on their next generation of Versal ACAP devices. With dedicated AI inference engines as well as PL and PS components this looks to solidify Xilinx lead in the AI space. This was a very interesting peek on what’s to come.

Pre/Post show discussion with Adam Scraba; Director of Product Marketing, Data Center AI

Before and after the show I was able to have brief conversations with a former coworker of mine, Adam Scraba, and discuss some of the directions for the show, and my thoughts on how it went. There are a limited number of FPGA/ASIC engineers out there, and bringing the discussion to the table and trying to expand the Xilinx following is a very smart move on Xilinx’s part. Overall I think the show really pushed their agenda in the direction they want to go!


As a Xilinx Certified Alliance Partner, I gained access to the VITIS tool chain and played with it briefly before the show. Due to other constraints INFINETIX was not able to fully commit to having a demonstration project at the show, but after viewing what others were able to do in the very limited time I’m looking into working with some of our customers to make this happen. VITIS is not officially going to be released until the end of the month, but it is a game changer especially for those Cloud/Big Data customers out there. I’m excited to be digging deeper into these fields and helping customers fully integrate the power of VITIS in their solutions in the future! If you are looking to attend XDF Europe and ASIA are still coming up, you can learn more at:

Xilinx, the Xilinx logo, Artix, CoolRunner, ISE, Kintex, LogiCORE, Modelware, Petalogix, Pilotsync, RocketIO, Spartan, Virtex, Vivado, VITIS, WebPACK, and Zynq are registered trademarks of Xilinx.

Microsoft the Microsoft logo and Azure are registered trademarks of Microsoft.